1. Field of the Invention
The present invention relates to accelerating ARC4 processing. More specifically, the present invention relates to methods and apparatus for improving ARC4 based data stream encryption and decryption.
2. Description of Related Art
Conventional software and hardware designs for implementing ARC4 processing handle ARC4 operations in sequence. An ARC4 processing block in a cryptography engine typically reads and writes values into a memory in a set sequence. One read may be dependent on a prior write, or a write may be dependent on another prior write. Because of the dependencies, ARC4 operations are typically performed in a strict sequence. ARC4 and other key stream algorithms are described in Applied Cryptography, Bruce Schneier, John Wiley & Sons, Inc. (ISBN 0471128457), incorporated by reference in its entirety for all purposes.
To generate a single byte of key stream using ARC4, three reads and two writes to a memory are required. The dependencies in the read and write operations can cause a single round of ARC4 processing to take many clock cycles simply for data value reads and writes. In a conventional approach using a single ported memory, it takes 5 cycles to generate a single byte of key stream.
It is therefore desirable to provide methods and apparatus for improving ARC4 processing in a cryptography engine with respect to some or all of the performance limitations noted above.